The Solid-State Transformer (SST) provides numerous benefits to the power distribution system, such as bidirectional power flow regulation, VAR compensation, in addition to high-frequency galvanic isolation, and higher power density compared to classical 50Hz transformers. The Input Series Output Parallel (ISOP) configuration is one of the most used topology for SST applications. At the High Voltage (HV) stage, low-cost silicon (Si) IGBTs are ideal for implementing CHB cells due to their lower cost and ruggedness compared to upcoming SiC devices. However, Si devices make it hard to achieve a high switching frequency for medium voltage and high-power applications. SiC MOSFETs, on the other hand, have better loss performance than Si IGBTs. However, SiC MOSFETs are not a viable option for implementing CHB cells due to their higher cost.



This work presents a grid-connected, three-stage SST system that achieves the same effective switching frequency with nearly 50% less semiconductor loss in the HV stage compared to widely accepted Si IGBT-based solutions. The SST has three stages: High-voltage (HV) stage, DCDC stage, and Low-voltage (LV) stage. The SST system uses a CHB configuration to realize the HV stage. The last CHB cell of each phase is coupled to SiC MOSFET-based Voltage Source Converter, which will be referred to as High-Frequency Module (HFM) from here on. In the DCDC stage, all DC bus voltages of CHB cells are connected to the corresponding Series Resonance Dual Active Bridge (SRDAB) cell. The LV sides of all SRDAB cells are connected to a single LVDC bus. The LV stage is realized using a two-level (2-L) Voltage Source Converter (VSC). The proposed SST system switches CHB cells at line frequency to reduce switching losses. As a result, the proposed control enables CHB cells to be realized by cost-effective IGBT devices. Following that, the HFM, which is highly efficient, is switched at a high frequency to ensure a high net switching frequency and appropriate sinusoidal current profile in the HV stage. As a result, the proposed control action achieves a high effective switching frequency, quick transient response, sinusoidal line currents, and lower semiconductor loss. The SRDAB converters are operated at resonance conditions. It offers a constant gain at resonance. The proposed technique utilizes this intrinsic advantage of the SRDAB to regulate all of the DC bus voltages of the CHB cell during line frequency operation without any additional voltage balancing control. Furthermore, the resonance function ensures Zero Voltage Switching (ZVS) and Zero Current Switching (ZCS) under all loading conditions. The control generates precise switching angles for CHB cells, allowing them to draw necessary active power from the HV grid. As a result, the HFM module acts as an active series filter, filtering out harmonic voltages caused by line frequency operation. The switching angles of the CHB cell also ensure that the peak values of the harmonic voltages are as low as possible. This ensures that the DC bus voltage of the HFM module is kept to a minimum value. An additional SRDAB cell connected to the LVDC link provides an isolated DC supply to the HFM. The line frequency operation results in unbalanced voltage and power-sharing among CHB cells, resulting in asymmetrical component ratings. The limitation of unsymmetrical voltage, power, and component ratings is overcome using a circulation logic. The proposed control is proven experimentally in a 600 V/100 V, 5 kW prototype SST system.