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Optimizing power-accuracy trade-off in signal processing applications using approximate adders

Optimizing power-accuracy trade-off in signal processing applications using approximate adders

Date8th Mar 2021

Time09:00 AM

Venue Google Meet Link : meet.google.com/ada-umnk-rmq

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Details

Most image, audio and video processing applications are highly error-tolerant since humans do not perceive minor variations in them. These applications are often run in hand-held devices that demand low energy consumption. In such situations, error can be introduced deliberately in the application in such a way that we obtain reduction in power, delay and area, at the cost of reduced accuracy. This method of achieving trade-off between accuracy and performance metrics is referred to as approximate computing. In this thesis, a trade-off between power and accuracy is achieved by applying approximate computing at the architectural level by replacing accurate adders in a system with approximate adders.



An approximate adder named Median adder that gives the maximum power savings for a given mean error distance (MED) and mean square error (MSE) is proposed. When approximate adders are used in an application, the overall approximation error needs to be computed accurately and efficiently to facilitate design optimization. For this purpose, a parameterized error model is proposed to derive expressions for error statistics of various approximate adders in terms of input static probabilities. This error model is incorporated in an optimization framework for maximization of number of approximate bits in the adders satisfying a given MSE constraint. Since the error models depend on the input static probabilities, this optimization framework takes into account the position of the adder in the circuit, the number of approximate bits of the adder, the functionality and number of approximate bits of the parents of the adder nodes, to assign the static probability of the inputs. A variety of low power approximate adders are studied using this framework. In systems that have accurate multipliers, additional power savings can be obtained using certain approximate adders since they result in simplified multiplier architectures or lower number of toggles in the multiplier due to high or low output static probability. The thesis also looks at the implications for other metrics such as compression in JPEG and distortion in filters.

Speakers

Ms. Celia D (EE13D003)

Electrical Engineering