Future electronic devices require the concurrent development of hardware to store large quantity of data at a faster rate with very less power consumption. Silicon (Si) transistor technology has reached sub 10 nm for logic and about 14 nm for memory applications, further device scaling with conventional materials seems to face a brick wall due to several material and technological challenges. Therefore, to meet the emerging hardware requirements, the integrated circuit industry is eagerly looking for novel multifunctional materials and device/circuit architectures so as to have the energy efficient flexible electronics. Here, we propose to study electrical transport in atomically thin 2 dimensional layered materials with an aim to develop non-volatile flash memory technology. Atomic layers of different nature i.e. semiconducting, insulating and metallic will be integrated in the vertical heterostructures to function as non-volatile memory devices. The technology thus developed is expected to be of low power and energy efficient. Moreover, due to its flexibility, these materials can be integrated with wearable electronics which is highly desirable for future electronics.