Flicker noise in MOS transistors arises due to trapping/detrapping of channel carriers into traps located in gate dielectric. The power spectral density of flicker noise is inversely proportional to frequency, hence also known as 1/f noise. Flicker noise in analog circuits such as mixers, oscillators affects the performance in the form of phase noise due to its up-conversion noise.



Over the last two decades, aggressive scaling and innovations in device materials and architectures have reduced cost, increased speed and enabled integration of higher number of transistors on a chip. SiGe is an alternative channel material introduced to obtain lower threshold voltages in pFETs. Also, as device dimensions get scaled, conventional mobility enhancement techniques using stress liners and embedded source-/drain stressors are becoming less effective. Hence there is a revival of interest in SiGe channels due to higher hole mobility compared to silicon channel pFETs.



In this work, we made a setup and characterized flicker noise in high-k and metal gate (HKMG) SiGe channel pFETs. Further, the quality of gate-stack and gate dielectric-semiconductor interface was evaluated by profiling and extracting trap density in the transistor gate stack.