Photonic Integrated Circuits (PICs) have emerged as a promising technology for addressing the increasing demands of data centers in terms of bandwidth, power efficiency, and scalability. Silicon photonic switches are the integral components used in transceivers. Besides transceivers, PICs are also being potentially used for the demonstrations of microwave, neuromorphic, and quantum photonic processors. However, PICs often encounter challenges associated with hardware-fabrication errors resulting into high-power consumption (especially for on-chip switching/routing), which negatively impact the performance, scalability, and power efficiency in large-scale programmable photonic circuits. Most of the current techniques for error detection in PICs involve on-chip methods that rely on additional optical monitoring ports at various locations which increases the overall insertion loss as well as the complexity of the circuits.



This talk will present techniques that involve effectively detecting errors by tapless mechanisms and mitigating phase variations using thermo-optic phase shifters. Additionally, strategies for efficiently controlling and managing thermo-optic heaters in large-scale PICs will be discussed, including the utilization of off-chip control mechanisms using FPGA. Moreover, the challenge of limited bond pad availability at the chip's edge will also be addressed by discussing the present state of the art that reduces the number of bond pads using column row addressing of the PN diode with a Pulse Width Modulated signal for connecting thermo-optic heaters to off-chip power supplies. This talk will also feature an experimental demonstration of switching using an in-house fabricated 2x4 Mach-Zehnder Interferometer (MZI) architecture.