Export 2 results:Sort by: Author Keyword Title [ Type] Year
Filters: Author is K. Najeeb [Clear All Filters]
Delay and peak power minimization for on-chip buses using temporal redundancy. 16th ACM Great Lakes Symposium on VLSI. 2006:119-122..
Temporal Redundancy Based Encoding Technique for Peak Power and Delay Reduction of On-Chip Buses. J. Low Power Electronics. 2006;2:425-436..