Publications

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2012

Mutyam M. Fibonacci codes for crosstalk avoidance. IEEE Transactions on Very Large Scale Integration Systems. 2012:(to appear).

2011

Jose J, Shankar SJ, Mahathi KV, Kumar DK, Mutyam M. BOFAR: buffer occupancy factor based adaptive router for mesh NoCs. 4th ACM International Workshop on Network on Chip Architectures (NoC-Arc 2011) [Internet]. 2011:23–28. Available from: http://doi.acm.org/10.1145/2076501.2076506

Joshi A, Mutyam M. Prevention flow-control for low latency torus networks-on-chip. 5th ACM/IEEE International Symposium on Networks-on-Chip (NOCS 2011). 2011:41-48.

Mittal K, Joshi A, Mutyam M. Timing variation-aware scheduling and resource binding in high-level synthesis. ACM Trans. Des. Autom. Electron. Syst. [Internet]. 2011;16:40:1–40:19. Available from: http://doi.acm.org/10.1145/2003695.2003700

2009

Satyanarayana N, Babu VA, Mutyam M. Delay-efficient bus encoding techniques. Microprocessors and Microsystems - Embedded Hardware Design. 2009;33:365-373.

Mutyam M, Wang F, Ramakrishnan K, Narayanan V, Kandemir MT, Xie Y, Irwin MJ. Process-Variation-Aware Adaptive Cache Architecture and Management. IEEE Trans. Computers. 2009;58:865-877.

Mutyam M. Selective shielding technique to eliminate crosstalk transitions. ACM Trans. Des. Autom. Electron. Syst. [Internet]. 2009;14:43:1–43:20. Available from: http://doi.acm.org/10.1145/1529255.1529265

2008

Hussain MA, Mutyam M. Block remap with turnoff: A variation-tolerant cache design technique. 13th IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC 2008). 2008:783-788.

Kalyan VT, Mutyam M, Rao VSP. Exploiting Variable Cycle Transmission for Energy-Efficient On-Chip Interconnect Design. 21st IEEE International Conference on VLSI Design (VLSI Design 2008). 2008:235-241.

Papa AS, Mutyam M. Power management of variation aware chip multiprocessors. 18th ACM Great Lakes Symposium on VLSI (GLSVLSI 2008). 2008:423-428.

K R, Mutyam M. Process Variation Aware Issue Queue Design. IEEE International Conference on Design, Automation and Test in Europe (DATE 2008). 2008:1438-1443.

Kalyan VT, Mutyam M. Word-interleaved cache: an energy efficient data cache architecture. ACM International Symposium on Low Power Electronics and Design (ISLPED 2008). 2008:265-270.

2007

Satyanarayana N, Mutyam M, Babu VA. Exploiting on-chip data behavior for delay minimization. The Ninth ACM International Workshop on System-Level Interconnect Prediction (SLIP 2007). 2007:103-110.

Ricketts AJ, Mutyam M, Vijaykrishnan N, Irwin MJ. Investigating Simple Low Latency Reliable Multiported Register Files. IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007). 2007:375-382.

Mutyam M. Selective shielding: a crosstalk-free bus encoding technique. IEEE International Conference on Computer-Aided Design (ICCAD 2007). 2007:618-621.

Mupid A, Mutyam M, Vijaykrishnan N, Xie Y, Irwin MJ. Variation Analysis of CAM Cells. 8th IEEE Computer Society International Symposium on Quality of Electronic Design (ISQED 2007). 2007:333-338.

Mutyam M, Vijaykrishnan N. Working with process variation aware caches. IEEE International Conference on Design, Automation and Test in Europe (DATE 2007). 2007:1152-1157.

2006

Mutyam M, Li F, Vijaykrishnan N, Kandemir MT, Irwin MJ. Compiler-directed thermal management for VLIW functional units. ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2006). 2006:163-172.

Mutyam M, Eze M, Vijaykrishnan N, Xie Y. Delay and Energy Efficient Data Transmission for On-Chip Buses. IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006). 2006:355-360.

Najeeb K, Gupta V, Kamakoti V, Mutyam M. Delay and peak power minimization for on-chip buses using temporal redundancy. 16th ACM Great Lakes Symposium on VLSI. 2006:119-122.

Najeeb K, Gupta V, Kamakoti V, Mutyam M. Temporal Redundancy Based Encoding Technique for Peak Power and Delay Reduction of On-Chip Buses. J. Low Power Electronics. 2006;2:425-436.

2005

Mutyam M, Krithivasan K, Reddy SA. On Characterizing Recursively Enumerable Languages by Insertion Grammars. Fundam. Inform. 2005;64:317-324.

Mutyam M. Rewriting P systems: improved hierarchies. Theor. Comput. Sci. 2005;334:161-175.

2004

Subrahmanya P, Manimegalai R, Kamakoti V, Mutyam M. A Bus Encoding Technique for Power and Cross-talk Minimization. 17th IEEE International Conference on VLSI Design (VLSI Design 2004). 2004:443-448.

Mutyam M. Descriptional Complexity of Rewriting P Systems. Journal of Automata, Languages and Combinatorics. 2004;9:311-316.

Mutyam M, Krithivasan K. Length Synchronization Context-Free Grammars. Journal of Automata, Languages and Combinatorics. 2004;9:457-464.

Mutyam M. Preventing Crosstalk Delay using Fibonacci Representation. 17th IEEE International Conference on VLSI Design (VLSI Design 2004). 2004:685-688.

Mutyam M, Prakash VJ, Krithivasan K. Rewriting Tissue P Systems. J. UCS. 2004;10:1250-1271.

2003

Ceterchi R, Mutyam M, Paun G, Subramanian KG. Array-rewriting P systems. Natural Computing. 2003;2:229-249.

Mutyam M, Krithivasan K. On a class of P automata. Int. J. Comput. Math. 2003;80:1111-1120.

Mutyam M. Probabilistic Rewriting P Systems. Int. J. Found. Comput. Sci. 2003;14:157-166.

Balan SM, Krithivasan K, Mutyam M. Some Variants in Communication of Parallel Communicating Pushdown Automata. Journal of Automata, Languages and Combinatorics. 2003;8:401-416.

2002

Krithivasan K, Mutyam M. Contextual P Systems. Fundam. Inform. 2002;49:179-189.

Mutyam M, Krithivasan K. Generalized normal form for rewriting P systems. Acta Inf. 2002;38:721-734.

Mutyam M, Krithivasan K. Improved Results about Universality of P systems. Bulletin of the EATCS. 2002;76:162-168.

Mutyam M, Krithivasan K. A Note on Hybrid P Systems. Grammars. 2002;5:239-244.

Mutyam M, Krithivasan K. A Survey of Some Variants of P Systems. International Workshop on Membrane Computing (WMC-CdeA 2002). 2002;LNCS (2597):360-370.

2001

Mutyam M, Krithivasan K. P Systems with Membrane Creation: Universality and Efficiency. Third International Conference on Machines, Computations, and Universality (MCU). 2001;LNCS (2055):276-287.

2000

Mutyam M, Krithivasan K. Universality Results for Some Variants of P Systems. Multiset Processing, Mathematical, Computer Science, and Molecular Computing Points of View [Workshop on Multiset Processing]. 2000;LNCS (2235):237-254.